Successive approximation routine (SAR) analog-to-digital converters (ADCs) convert an analog input to a digital value. Typically, the analog input is held while the SAR ADC circuit converges to a solution after a number of bit trials. Some SAR ADC circuits convert a differential analog input to a digital value. A differential SAR ADC may require that the common mode of the input signal to be at a fixed value, e.g., Vref/2. This can be accomplished by additional circuitry to translate the input common mode to the common mode required by the SAR ADC. However, this additional circuitry can result in additional space needed for an SAR ADC circuit, additional power consumption, and can introduce additional sources of noise in the signal chain.